ASIC Design Engineers for Bangalore

ASIC DESIGN

We are looking for experienced ASIC design engineers to join the development of low power design and efficient system buses. This individual will be responsible for design and implementation of modules from start to finish. Specific areas include backbone buses and power management designs. You will be expected to make architectural tradeoffs based on features, performance requirements and system limitations, come up with micro-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design. You will also be required to support silicon validation. You will be working with architects, other designers, pre- and post-silicon verification teams, synthesis, timing and backend teams to accomplish your tasks.

MINIMUM REQUIREMENTS:
BS or MS in electrical engineering or computer engineering.
3-15 years of experience working on ASIC development.
Good understanding of ASIC design flow including RTL design, verification, prototyping, DFT, timing analysis, floorplanning, ECO, bringup & lab debug
Good Knowledge of Verilog RTL coding/design required
Familiarity with ARM buses low power designs would be a plus.
Good communication skills and ability & desire to work as a team player are a must

Share your profile on shahzad@aasthahs.com.

Regards,
Shahzad